The TrueSilicon CAN Controller IP is a robust communication interface designed for system-on-chip (SoC) architectures, enabling reliable message-based communication between host processors and CANcompatible network nodes. The IP integrates seamlessly into AMBAbased systems through an APB (Advanced Peripheral Bus) interface for configuration, control, and status register access, ensuring efficient and low-overhead integration in embedded and automotive applications.

The controller supports classical CAN protocol operation compliant with ISO standards, with optional support for extended frame formats. It enables flexible configuration of bit timing parameters, including propagation, phase segments, and synchronization jump width, allowing precise control of baud rates to meet diverse network requirements.

TrueSilicon's CAN Controller IP supports both standard (11-bit identifier) and extended (29-bit identifier) frame formats, along with programmable filtering mechanisms for efficient message acceptance. The IP incorporates transmit and receive message buffers, enabling prioritized message handling and reducing CPU intervention during high network traffic conditions.

The controller provides error detection, fault confinement, and automatic retransmission capabilities in compliance with CAN protocol specifications. Integrated error counters and status reporting mechanisms allow robust system-level diagnostics and fault handling. Configurable interrupt generation supports various events such as message reception, transmission completion, error conditions, and buffer status changes, ensuring efficient system responsiveness.

The IP includes programmable acceptance filters and masks to selectively receive relevant messages, minimizing software overhead. Support for multiple transmit mailboxes enables prioritized transmission scheduling, improving real-time communication performance in multi-node networks.

The fully synchronous RTL design ensures clean clock-domain operation, predictable timing behaviour, and straightforward static timing analysis (STA). The architecture is optimized for power, performance, and area (PPA), making it suitable for a wide range of semiconductor technologies and applications, including automotive, industrial control, and embedded systems.

Figure 1 illustrates the high-level architecture of the TrueSilicon CAN Controller IP, including the APB configuration interface, bit timing logic, protocol engine, transmit and receive buffers, acceptance filtering unit, and interrupt control logic. With these capabilities, the TrueSilicon CAN Controller IP provides a scalable, reliable, and integration-ready communication solution. It accelerates SoC development, reduces software complexity, and enables robust, real-time data exchange across distributed embedded systems.